Nano-scale MOS transistors: Semi-classical modeling and applications

GENERAL INFORMATION

Course name

Nano-scale MOS transistors: Semi-classical modeling and applications

ECTS credits

3

Start date

26.5.2014

End date

30.5.2014

Location

DIEGM, Via delle Scienze 206, 33100 Udine, Italy

Website

http://phd.diegm.uniud.it/

Registration fee for PhD students

400 euros

Accredited by

Università degli Studi di Udine

Minimum number of students

5

 

DESCRIPTION OF COURSE

The Course “Nano-scale MOS Transistors: Semi-classical Modeling and Applications” stems from several years of experience and research activity by the Nano-electronics group at the University of Udine in the field of modeling, simulation and characterization of advanced CMOS devices. The group is formed by Prof. Luca Selmi, David Esseni and Pierpaolo Palestri, all affiliated to the DIEGM, University of Udine.

The course consists of three parts delivered by the group members and for a total of 3 ECTS.  Each part is made of approximately 8 hours front lectures plus homework and practical labs,   where the students will be asked to write C or MATLAB programs to solve simple modeling problems.

The course aims at giving a description (in terms accessible to both physicists and electronic engineers) of advanced models for modern nano-MOSFET architectures exploiting technology boosters for enhanced channel mobility and reduced leakage. The prerequisite knowledge in physics is limited to the basic concepts of the classical electrostatics and electrodynamics and to the basic notions and methods of the quantum mechanics. For an optimum preparation to the course the following reading is suggested: M. Lundstrom, “Fundamentals of Carrier Transport”, Cambridge Press, chapters 1, 2 6.

The expected learning outcomes can be summarized as follows: 1) understanding of the reasons to develop advanced models beyond conventional drift diffusion theory for a proper description of state of the art and future CMOS technology; 2) understanding of quantization phenomena in MOSFETs and implications on electrostatics and transport; 3) understanding the key ingredients and the  approximations behind semi-classical MOSFET modeling; 4) ability to develop simple one dimensional models for quantization and transport in the semi-classical framework; 5) understanding stress/strain effects in MOSFETs; 6) ability to analyze the effectiveness of sub-band engineering options.

 

DETAILED PROGRAM

The course will start in the early afternoon of Monday May 26 to allow students to travel during the morning and will end on Friday at lunch time.

▪ Part I

Overview of CMOS technology evolution, scaling trends and generalized scaling scenarios. New device architectures and new channel materials. Need for advanced modeling and simulation in modern nanoelectronics. Brief introduction to quantum mechanics in crystals, band structure of Si, Ge and III-V semiconductors, wave-packet motion in slowly and rapidly varying potentials, free flights,  scattering and the semi-classical transport model. Quantization phenomena in MOSFETs. Laboratory and homeworks.

▪ Part II

Scattering theory in in silicon and alternative channel material inversion layers. Scattering mechanisms. Mobility calculations with the Momentum Relaxation Time Approximation. Strain effects. Laboratory and homeworks.

▪ Part III

Semi-classical transport with the Boltzmann Transport Equation for bulk materials and inversion layers.

Solution of the BTE by means of the Monte Carlo and Multi-Subband Monte Carlo methods. Modeling MOSFETs in alternative semiconductor materials. Laboratory and homeworks.

COURSE SUPPORT PROVIDED

Copies of the slides will be distributed to the participants. The students willing to gain a deeper knowledge in the field will find additional study material in the reference book “D.Esseni, P.Palestri, L.Selmi, Nano-scale MOS transistors: Semi-classical modeling and applications”, Cambridge Press, 2011. The teachers will be available to answer the student’s questions during the week of the course. The students will be granted a working place and access to the internet at the University premises.

LOGISTICS

HOTEL AND LODGING

  • List of hotels in Udine with special agreements for discounted rates with the University of Udine. Make sure to mention the University rate when you book your room.
  • A limited amount of rooms at reduced price are available at the Residenza Universitaria Delle Grazie.
  • Also, limited number of rooms at reduced price will be available at the CISM. Contact CISM directly to check availability.

TRAVEL INFORMATION

Travel information is available from this page.

REGISTRATION PROCEDURE

  1. Download the registration form
  2. Fill in all parts of the form
  3. Send it to palestri@uniud.it and wait for aknolwedgement of receipt