Lecture Announcement,
Quantum transport modeling in electron nanodevices, The course consists of 4 hours , and lectures will be on:
October 27th , 10:00 – 12:00 (Sala Gialla – DPIA – UniUD)
October 28th , 10:00 – 12:00 (Sala Gialla – DPIA – UniUD)
Dr. Marco Pala
Centre de Nanosciences et de Nanotechnologies CNRS, Université Paris-Saclay Palaiseau, France
The electronic industry success has been driven by the scaling of physical sizes of transistors. Today, the channel length of the MOSFET has been scaled well below 20 nm. Addressing accurate simulations of electronic and transport properties of such nanoscale devices demands to consider quantum mechanical effects as well as phonon scattering and spatial fluctuations due to non-ideal surfaces and defects. This lecture will introduce the basics of quantum transport theory and will focus on on the non-equilibrium Green’s function formalism showing its application in the simulation of nanodevices. Further, I will discuss advantages and drawbacks of different Hamiltonian models used to describe the energy dispersion relation of the semiconducting channel material, going from the effective mass approximation to empirical pseudopotentials. Illustrative results on FDSOI and nanowire FETs will be presented. In the last part, I will introduce a recently developed first-principles transport methodology employing Hamiltonians obtained from the density functional theory. Such an approach enables full ab-initio quantum transport calculations with a reasonable computational cost and permits to address self-consistent simulations of electron devices based on novel materials such as layered 2D semiconductors and metals.
Curriculum Vitae:
Marco Pala received the physics degree and the PhD in electronical engineering from the University of Pisa, Italy in 2000 and 2004, respectively. From 2004 to 2005 he was post-doc at CEA-LETI, Grenoble, France. He joined the CNRS as research scientist in 11/2005 at IMEP-LAHC, Grenoble. From 2016 he is with the Centre for Nanoscience and Nanotechnology (C2N), Palaiseau, France, where is the leader of the computational electronics group. He has supervised 15 PhD students and 5 post-doc fellows. He has been involved as partner leader or principal investigator in 11 national and 9 European projects. He is or has been member of technical committees of international conferences such as IEDM, ESSDERC, IWCN. In the past he worked on several topics such as spin-dependent transport in 1D and 2D structures, charge fluctuations in single-electron transistors, scanning-gate microscopy, steep slope and ultimate CMOS transistors. At the present time his main research interests concern the electronic and transport properties of nanoscale devices. His recent interests concern quantum transport calculations based on ab-initio methods to assess the use of new materials in nanoelectronics. He is co-author of 73 papers in peer-reviewed journals and 48 proceedings in international conferences.